NASA's New RISC-V Space Chip Hits 500x Performance, Aims for Onboard AI on the 2028 Moon Landing

NASA is benchmarking a new radiation-hardened processor that runs 500 times faster than the chips currently piloting the James Webb Space Telescope and the Curiosity and Perseverance rovers — a leap that, if it clears qualification testing by late 2026, will give the agency its first real opportunity to put modern AI workloads on deep-space hardware. The chip, designated the PIC64-HPSC, is being built by Microchip Technology of Chandler, Arizona, under a 2022 commercial partnership with NASA's Jet Propulsion Laboratory.

The headline number is the AI math. NASA's previous workhorse, the RAD750, has dominated spaceflight computing for nearly two decades and runs JWST off a single 118 MHz core launched in December 2021. The PIC64-HPSC hits roughly 100x the RAD750 on scalar workloads and 500x on the vector and AI workloads that matter for things like onboard image recognition and event detection. JPL engineers liken its raw performance to an Intel i7 in a 2022 Windows laptop — except this version survives high-energy solar particles, extreme temperature swings, launch vibrations, and zero repair capability from Earth.

The architectural choice is just as consequential as the speed. The PIC64-HPSC is built on the open-source RISC-V instruction set, with SiFive supplying the cores. That breaks the vendor lock-in NASA has lived with for years and lets flight software developed for other RISC-V platforms port without a rewrite. It also positions RISC-V as the go-to ecosystem for future NASA missions — a quiet but seismic decision for the agency's computing roadmap.

What does 500x buy you on a probe? Autonomy. With AI vector units, networking, memory, and I/O integrated into a single system-on-a-chip, a future spacecraft approaching Europa or orbiting an active asteroid could detect an unexpected event, assess its scientific value, reconfigure its instruments, and start capture without waiting for a command from Earth. The same compute can compress and triage science data on board, squeezing more discovery out of every bit sent home over the bandwidth-starved Deep Space Network.

The clock is tight. JPL began testing the chip in February 2026 — symbolically, the first email routed through it had the subject line "Hello Universe" — and full radiation, thermal, and shock qualification is expected to wrap in the coming weeks. The PIC64-HPSC must clear JPL certification by late 2026 to stay on the manifest for the Artemis IV crewed lunar landing in early 2028. Beyond the Moon, the chip is the linchpin of NASA's plan for AI-equipped probes to Mars, the outer planets, and the asteroid belt.